Lockmate; Enhancing Machine Learning Performance with Custom Hardware Acceleration

Ivanov, Emil, School of Engineering and Applied Science, University of Virginia
Seabrook, Bryn, EN-Engineering and Society, University of Virginia
Foley, Rider, Engineering and Society, University of Virginia
Barnes, Adam, EN-Elec & Comp Engr Dept, University of Virginia

The two projects, "Lockmate" and "Enhancing Machine Learning Performance with
Custom Hardware Acceleration," showcase the interconnection between digital security and
computational advancement. "Lockmate" presents a solution to the urgent need for reinforced
security in smart home devices, focusing on a novel electrical lock system that integrates
advanced encryption algorithms to protect against unauthorized access that can be integrated
onto any household deadbolt door. On the other hand, the exploration of Field-Programmable
Gate Arrays (FPGAs) in enhancing machine learning performance highlights the idea of using
FPGAs in specific machine learning applications in order to accelerate different designs. As the
two projects are loosely related, each had their own motivation. “Lockmate” provides a solution
to current electrical lock designs as it allows for a user to transform any regular deadbolt lock
into a smart lock. On the other hand, the STS research was conducted as the field of machine
learning has been exponentially growing over the years, with society increasing their reliance on
different applications such as self-driving cars. Although the two are not directly related, both
projects share the same goal which is the pursuit of technologically innovative solutions that are
embedded in sociotechnical considerations, ensuring that advancements in digital and
computational technologies are not only effective but also align with societal needs and ethical
Lockmate is a proposed solution that addresses security vulnerabilities inherent in smart
home devices. Lockmate innovatively combines hardware, firmware, and software to transform
existing deadbolt doors into secure, smartphone-operated locks while maintaining traditional key
access and resilience during power outages. The design is made up of two microcontrollers for
energy efficiency, a motor for physical manipulation of the lock, radio-frequency transceivers for
communication between the two microcontrollers, a Bluetooth module for communication
between the user and the device, a WIFI module for live updates and communication, and
encryption algorithms for data security. The design is additionally encapsulated by a two 3D
printed shells. The first holds all of the low power elements of the design which is attached to the
door, while the other shell holds the parts that consume more power and is directly plugged into
an outlet. This approach not only addresses the technical challenges of installing a new electric
lock but also considers social factors, such as the potential use case of where a stranger is
maliciously trying to access personal information.
The research done by the paper "Enhancing Machine Learning Performance with Custom
Hardware Acceleration" focuses on the integration of FPGAs within machine learning
applications, evaluated through a Science and Technology Studies (STS) lens. The research
investigates the socio-technical considerations when adopting FPGA designs and architectures
across different machine learning designs. Utilizing the Social Construction of Technology
(SCOT) framework, the study delves into the mutual shaping of technology and society,
highlighting how social dynamics impact the development and utilization of FPGAs in machine
learning contexts. Through interviews with a professional in industry, the paper uncovers diverse
viewpoints on FPGAs' role in machine learning, encompassing themes of performance
enhancement, energy conservation, and the broader socio-technical challenges. The findings aim
to enrich the reader’s understanding of the connections between technological innovation and
societal structures. The paper emphasizes the importance of considering both technical
capabilities and social implications in the advancement of machine learning technologies.
Working simultaneously on the capstone project "Lockmate" and the STS research paper
"Enhancing Machine Learning Performance with Custom Hardware Acceleration" has provided
a unique and enriching educational experience, offering insights that would not have been
achieved if the projects were undertaken independently. This concurrent approach allowed for a
deeper understanding of the interplay between practical engineering solutions and their broader
societal implications, particularly in the realm of digital security and machine learning
optimization. Through the development of “Lockmate”, the necessity of integrating technical and
social considerations in engineering design became apparent through each step of the design
process, as each decision was critical to the final version of the design and all of its users.
Meanwhile, the STS research on FPGAs and machine learning emphasized the socio-technical
dynamics influencing technology adoption and performance, offering a theoretical perspective
that would have not been covered by the capstone project itself. Engaging with both projects
concurrently allowed for theory and practice to be joined together providing me with a learning
experience in both the conduction of research and designing user-based hardware with
limitations and criteria. This experience has not only enhanced my technical and analytical skills
but also shaped my future research direction towards the further exploration of FPGAs in my
graduate studies.

BS (Bachelor of Science)
FPGA, Machine Learning, Acceleration

School of Engineering and Applied Science

Bachelor of Science in Electrical Engineering

Technical Advisor: Adam Barnes

STS Advisor: Bryn Seabrook

Technical Team Members: Rory Gudka, Alexandros Pfoser, Rohit Rajuladevi

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