Where memory chips go bad: agglomerative hierarchical cluster analysis
Bagnall, Timothy M, Department of Systems and Information Engineering, University of Virginia
White, K. P., Department of Systems and Information Engineering, University of Virginia
Mastrangelo, Christina, Department of Systems and Information Engineering, University of Virginia
Mehalik, Matthew M., Division Technology, Culture, and Communication, University of Virginia
This thesis investigates the performance of agglomerative hierarchical cluster analysis on computer chip defect clusters. Agglomerative hierarchical cluster analysis is a method used to identify the shapes and locations of clusters, and thus can be a valuable tool used to improve profit. The performance of four methods of agglomerative hierarchical cluster analysis is disclosed in this thesis: single-linkage clustering, complete-linkage clustering, centroid-method clustering, and average-linkage clustering. This research shows that single-linkage clustering is the best method of the four investigated.
All semiconductor plants make computer chips on the surface of a silicon disc, or wafer. Each wafer holds approximately 272 chips and undergoes a 100-step sequence combining photographic exposure techniques with controlled chemical reactions. Along the way, many of these processes go awry causing wasted chips and consequently profit loss. At the end of production, quality-check machines calculate production yield to determine the percentage of chips deemed good on a wafer. Low yielding wafers usually exhibit clusters of bad computer chips. Defect clusters can result from problems associated with manufacturing processes. Their shapes and locations on a wafer hint towards specific manufacturing problems that DSC can correct to improve profit.
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BS (Bachelor of Science)
English
All rights reserved (no additional license for public reuse)
2001