SPADE: Stencil PIM and Data-layout framEwork 120 views

Stencil computing is a widely used high performance computing task that iteratively updates elements in a grid based on their neighbors. Stencil computing has a wide range of applications including image processing and solving differential equations. Stencil computations are typically memory-bound, meaning their runtime is dominated by memory access time, rather than compute time. This happens because the arithmetic intensity, or ratio of compute operations to memory operations, of stencil computing is typically low, which can cause the CPU to stall while waiting for memory accesses. Processing in Memory (PIM) is a computing architecture that places compute logic in DRAM. PIM can accelerate memory-bound workloads: because the compute logic is near the data in memory, the memory access time is greatly reduced. Thus, this motivates using PIM for stencil computations. Stencil computing is also highly parallelizable because the updates for each element in the grid can be computed in parallel. PIM can also offer a high degree of parallel compute, as DRAM has a large number of potential places for compute logic. This is another motivation for performing stencil computations using PIM. When computing stencil in parallel, not specifically for PIM, it is often necessary to have frequent data transfers between cores, so that the updated values can be exchanged. Depending on the data-layout in PIM, the performance cost of these data transfers can vary. However, existing PIM APIs lack support for implementing stencil-like computations with these data transfer patterns. Therefore we introduce SPADE. SPADE includes a framework for reducing inter-core transfer costs for kernels with stencil-like data transfer patterns. SPADE also includes an API for creating stencil-like PIM kernels. Finally, SPADE provides an implementation of stencil computing for PIM using the SPADE API. We open source our work at https://github.com/Arleee1/SPADE.

MS (Master of Science)

Processing in Memory (PIM); Stencil Computing; API; Optimization; Computer Hardware

English

2026-04-23