Fabrication Advancements and Characterization of Heterogeneously Integrated Gallium Arsenide Schottky Diodes and Circuits

This thesis presents an optimized fabrication process for heterogeneously integrated quasi-vertical gallium arsenide (GaAs) Schottky diodes (QVDs), building on prior work in our research group utilizing silicon micromachining. The process is tailored for compact membrane-based circuits, featuring closely spaced diodes with gold-plated, side-coated vias and freestanding 3-µm thick gold beam leads. The process has been optimized for <2 µm feature tolerance, minimizing or eliminating unwanted etch effects, such as undercutting, residue, and reduced processing time. One of these new approaches includes diffusion bonding, which achieves a metal-to-metal interface and enables integration onto silicon for enhanced thermal handling. The diffusion-bonded QVDs exhibit comparable electrical performance and superior thermal dissipation compared to previously fabricated adhesive-bonded diodes. Collaborative work with Virginia Diodes yielded membrane-based multiplier chip designs, where frequency doublers fabricated using the above-mentioned QVD process advancements were tested against lateral (planar) diode designs. The QVD offers potential advantages over the lateral/planar diode due to its geometry, including reduced parasitics, lower series resistance, and improved thermal handling.