Digital Circuits and Systems for Ultra-Low Power Internet of Things Applications

Author: ORCID icon orcid.org/0000-0003-0625-0353
Breiholz, Jacob, Electrical Engineering - School of Engineering and Applied Science, University of Virginia
Advisor:
Calhoun, Benton, EN-Elec/Computer Engr Dept, University of Virginia
Abstract:

The Internet of Things (IoT) is growing at an exponential rate, and some estimate that it will reach 1 trillion devices by 2035. Although IoT devices are functionally diverse, many of them are designed to sense, process, and transmit information. The IoT has the potential to produce tremendous amounts of information that can be used to improve human life, but the proliferation of IoT devices is currently being hindered by the challenge of large-scale battery recharge and replacement, which increases the cost of device deployment. In recent years, significant research has focused on lowering the power consumption of IoT sensing devices so that they can operate from ambient harvested energy instead of batteries. This eliminates the need for battery recharge and replacement, and significantly reduces the maintenance costs of large-scale sensor networks. Lower power consumption improves self-powered device lifetime and reliability, and enables operation with smaller energy harvesters in more energy-scarce environments.

This dissertation presents contributions in integrated circuit and self-powered system design for reducing the power consumption of IoT sensing devices and accelerating their adoption. This is accomplished using digital circuits, digital circuit design techniques, and system-level strategies that reduce the power of wireless Transmitter (TX) and digital processing circuits in Ultra-Low Power (ULP) System on Chips (SoCs). Wireless TX and digital processing circuits are both essential components in ULP SoCs, but they often dominate the overall system power in many applications, limiting the device lifetime and functionality. This dissertation also presents the design of several ULP SoCs, their applications, and integration into larger sensing systems to demonstrate the technology readiness of self-powered devices and encourage adoption.

This dissertation presents several research contributions. Chapter 2 presents a lossless data compression accelerator designed to reduce the amount of sensor data that must be transmitted, and thus wireless TX power. Test chip measurements show that this accelerator adds only 4.4 nW processing power overhead, and reduces the overall SoC power by 2.9x for an application that samples Electrocardiogram (ECG) data at 360 Hz.  At the time, this design achieved the highest compression ratio and the lowest power for lossless low-overhead ECG compression. Chapter 3 presents a RISC-V microprocessor core implemented using a new performance-scalable version of Dynamic Leakage Suppression (DLS) logic, which enables a continuous power-performance trade-off at power levels below the leakage floor of conventional static CMOS circuits. DLS logic is an emerging method for implementing digital circuits that is significantly lower power than conventional static CMOS, but much slower.  This trade-off is acceptable though, as many IoT sensing applications have low sampling frequency requirements. Test chip measurements demonstrate that this microprocessor core can scale its performance from 6 nW at 11 Hz to 140 nW at 8.2 kHz at a constant 0.6 V supply voltage, and achieves a minimum power consumption of 840 pW across the full supply voltage range. Chapter 4 presents a gate-level multi-threshold technique designed to bridge the power-performance gap between different variants of DLS logic. An array of 8-bit Multiply-Accumulate (MAC) blocks demonstrate that this technique enables up to 6.5x power reduction, and power savings throughout the 10 Hz–1.4 kHz range across the 0.2 V–1.0 V supply voltage range. Chapter 5 presents two ULP SoCs, their IoT sensing systems, and applications. The first SoC implements several health-monitoring applications, and is also integrated into a larger wearable cardiac monitoring system designed for comfortable long-term use. The wearable system is entirely powered by body heat, and consumes just 65 μW when wirelessly transmitting ECG data to a smartphone. The second SoC is part of a wireless wake-up and control system designed to reduce the electricity usage of miscellaneous electric loads (common household appliances such as power adapters, televisions, and coffee makers) and consumes just 85 nW for this application. Together, these contributions in low-power digital circuit and self-powered system design will help realize the vision of a 1 trillion or more device IoT.

Degree:
PHD (Doctor of Philosophy)
Keywords:
ultra-low power, system on chip, data compression, dynamic leakage suppression, DLS, integrated circuit, self-powered, internet of things, digital circuits
Language:
English
Issued Date:
2021/01/20