Mixed Signal Platform Circuits for Ultra Low Power Systems
Shrivastava, Aatmesh, Electrical Engineering - School of Engineering and Applied Science, University of Virginia
Calhoun, Benton, Electrical Engineering, University of Virginia
Ultra-Low Power (ULP) Systems on Chip (SoCs), such as wireless sensor nodes, are being used for an ever-increasing number of applications. They can be used for applications measuring and reporting almost everything, from the flow of crude oil in a remote pipeline, to the degree of corrosion in a steel bridge, to electrocardiogram (EKG), electroencephalogram (EEG), and electromyogram (EMG) signals of a home health patient. Owing to their remote locations and small form factor, these nodes need to consume extremely low power. They should operate from harvested energy, as changing their batteries regularly is not a viable option. Energy autonomy is central to the widespread deployment of these sensor nodes. However, a significant percentage of energy is lost in harvesting, supplying regulated output voltages, and in the “idle mode” of the state-of-the- art sensor nodes. Therefore, energy efficiency is the most important challenge facing the design of these sensor nodes.
The design of the processor, radio, memory, etc. for a sensor node has received much attention. However, a sensor node also needs clock sources and power supplies to be able to operate. These circuits constitute the “infrastructure” around which a digital system can be created. In wireless sensors, these circuits help extract energy from harvesters, provide regulated output voltages and clock sources for the SoC. The design of these infrastructure circuits can impact the energy efficiency and hence the life time of the SoC significantly. In the state-of-the- art energy harvesting wireless sensor SoC, a significant percentage of energy is lost in harvesting and supplying regulated output voltages for the sensor node due to the poor efficiency of the harvester and voltage regulators. Also, wireless sensor nodes typically have a short burst of activity followed by a long idle time. This is done to save energy. The total power consumption of a sensor is often dictated by the power consumed in the idle mode. A clock source is often the only functional circuit in the idle mode, which is used for time keeping for “wake up” and synchronization needs. For such SoCs, clock power determines the life-time.
This work focuses on the flow of energy in ULP SoCs, such as wireless sensors. The proposed circuits enable highly efficient energy extraction from energy harvesters that can harvest solar and thermo-electric energy, efficient voltage regulators to provide power supplies for the SoC, the proposed work enables low voltage operation, and a ULP Clocking scheme to elongate the life-span in idle mode. These circuits increase the amount of energy harvested from the ambient source, reduce the loss in voltage conversion, enable low voltage operation and decrease the power consumption in idle mode to significantly improve the operational life time of a ULP system.
PHD (Doctor of Philosophy)
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