Near-Zero Power Wake-Up Receivers for the Internet of Things

The Internet of Things (IoT) envisions the networking of a massive amount of interconnecteddevices. These devices enable us to monitor and control our world in a way never possible before.A significant aspect of this technology is the deployment of massive wireless sensor networks(WSN). A critical consideration in large-scale WSN is the sensor node power consumption. Inmassive WSN, regular battery replacement is infeasible, and node power consumption limits thesensor node lifetime [1]. Event-driven sensor networks are large-scale WSN that spend most oftheir lifetime in an asleep yet aware state. These sensors obtain low power consumption and longlifetimes through aggressive node-level duty cycling. One method of performing node-level dutycycling is to use a wake-up receiver circuit. Wake-up receivers are ultra-low-power radio frequencyreceiver circuits used to duty cycle the sensor node, based on an external wireless wake-up event.Ideally, the standby power consumption is kept at near-zero power levels (<1μW).This dissertation investigates how to overcome sensitivity limitations in near-zero power levelwake-up receivers. While previous work has presented wake-up receiver circuits operating at verylow power levels (<100nW), these receivers suffered from severely limited operating ranges dueto their reduced sensitivities [2], [3]. The initial intended application for these sub-100nW sen-sors was ultra-short-range body area networks operating over a few meters. This limited operatingrange restricts the application space available to sensor nodes using these wake-up receivers. It isdesirable to decrease wake-up receiver power consumption further, while obtaining significantlyhigher receiver sensitivities, enabling longer-range applications.This work first examines the “detector first” receiver architecture, which has obtained the lowestpower consumption to date. A particular emphasis is placed on the envelope detector circuit,which is a critical component in the detector first architecture. Further, this document exploresthe advantages associated with highly tunable bit-level, duty-cycled, tuned radio frequency (TRF)front ends and presents a receiver that demonstrates a 1000-fold improvement in sensitivity overiii
the envelope detector (ED) first receivers.Chapter 2 discusses ED analysis and design techniques that led to the development of the wake-upreceiver presented in Chapter 3. The detector first receiver, presented in Chapter 3, demonstrateda better sensitivity of−76dBmwhile obtaining a power consumption of7.4nW. Using anautomatic offset compensation algorithm and careful baseband design, this receiver was shown tobe resilient to external radio frequency (RF) interference. This work has extended state-of-the-artin sub-W wake-up receivers in both sensitivity and robustness. A new ED topology is introduced inChapter 4, which addresses many robustness issues and shortcomings of the conventional DicksonED.The analysis presented in Chapter 2 indicates that state-of-the-art detector first receivers are rapidlyapproaching their fundamental limitations regarding sensitivity. To extend the operating range fur-ther, Chapter 5 proposes a bit-level duty-cycled TRF receiver to overcome the sensitivity bottle-necks encountered in ED first receivers. Chapter 6 presents techniques to enable low-power goodsensitivity TRF receivers. The combination of improvements in TRF design with the architec-ture proposed in Chapter 5 has enabled a higher than 1000 increase in sensitivity over the systempresented in Chapter 3.The developments presented in this work will drive higher wake-up receiver sensitivities and lowerpower operation. Higher sensitivity has enabled a communication range improvement in smart sen-sor nodes. Receivers operating with the old sensitivities were limited to short-range applications,such as across the body. With the advances proposed here, operating ranges can be extended toseveral kilometers, or potentially to satellites in near-earth orbit