A Digital System Design Methodology for Efficient-Quality Tradeoffs Using Imprecise Hardware
Huang, Jiawei, Computer Engineering - School of Engineering and Applied Science, University of Virginia
Lach, John, Department of Electrical and Computer Engineering, University of Virginia
High power consumption has become a major barrier in the design of modern application-specific integrated circuits (ASICs). Recent studies have demonstrated the potential for significant power reduction in ICs by allowing errors to occur during computation. While most existing techniques for achieving this rely on voltage-overscaling (VOS), it is only one example in the vast design space of Imprecise Hardware (IHW), which is capable of converting relaxed quality requirements into higher implementation efficiency.
First we present the generalized concept of IHW, of which VOS is an example. A mathematical approach to IHW characterization is introduced to quantify error characteristics. We also present several novel IHW examples, including fidelity-compromising transformations at the algorithm level, imprecise adders and multipliers at the RTL level and the combined use of IHW and VOS.
Since IHW expands the design space of traditional HW by one dimension (quality), it is imperative to develop a fast and accurate quality evaluation method to efficiently explore this space. We propose a static error estimation method that propagates the statistical distribution of data and errors through a network of arithmetic operations. It can be used to estimate the quality metrics of an IHW implementation without the need for simulation.
Finally, two methodologies for exploring efficiency-quality tradeoffs using IHW are presented. The first methodology is for applying fidelity-compromising transformations at the algorithmic level. The second methodology is for choosing IHW ALUs at the RTL level. They are fundamentally different from traditional circuit optimization methodologies in that they possess quality awareness and are capable of sacrificing quality for higher efficiency. Both methodologies can solve constraint-based and cost-function-based optimization problems. Experiments on real-world applications have shown that the proposed methodologies can achieve comparable results to exhaustive search but are orders of magnitude faster.
PHD (Doctor of Philosophy)
imprecise hardware, efficiency-quality tradeoffs, low power, error estimation
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